In general, a FIR digital filter, as shown in FIG. 1, has a non-recursive configuration comprising k one-clock delay elements D1-Dk, k+1 multipliers M1-M(k+1) for multiplication of the respective tap coefficients b.sub.0 -b.sub.k+1, and an adder A1 for adding these products. The transfer function H(z) of this FIR filter is given by the following equation. ##EQU1##
In order to realize the configuration by means of hardware, a product-sum operation circuit as shown in FIG. 2 has been generally employed. In FIG. 2, the respective tap coefficients stored in a ROM (Read Only Memory) 1 and the input X are sequentially multiplied together by a multiplier 2 in accordance with the clock timing. The respective results are sequentially entered to an accumulative adder 5 comprising an adder 3 and an accumulator 4, which plays parts of the delay elements D1 to Dk and the adder A1 of FIG. 1. Thus, the transfer function as shown in equation (1) can be realized.
The filter output Y is output at each time when the accumulative adder 5 has operated (k+1) times. In other words, the output Y of the FIR filter is caused by 1/(k+1) decimation of the output of the accumulator 4. However, since this decimation frequency is two or more times as great as a frequency of the passband of this filter, there is no problem occurring in the resulting filter output.
The moving average filter is obtained by setting all the tap coefficients b.sub.0 -b.sub.k+1 of the FIR filter shown in FIG. 1 to 1. In consequence, from the equation (1), the transfer function of the moving average filter can be given by the following equation. ##EQU2## As seen from this equation (2), the moving average filter is a nonpolar or all-zero lowpass filter in which k zero points are assigned at equal intervals on a unit circle of the z-plane with a zero point and a pole canceling out at z=1. Such a moving average filter can be realized in the circuit of FIG. 2 by setting all the tap coefficients of the ROM 1 to 1 or by only the accumulative adder 5.
The FIR filter in which two or more moving average filters are cascade-connected has the tap coefficients each being a positive integer. In consequence, the function of the multiplier in the product-sum operation circuit can be realized by the adder so that the amount of hardware is reduced.
In particular, in the FIR filter where two moving average filters are cascade-connected, its tap coefficients can be represented by a monotone increasing or decreasing function. Assuming that the two moving average filters cascade-connected have (k+1) and (l+1) tap coefficients, respectively, its transfer function can be given by the following equation. ##EQU3## As shown by this equation, the tap coefficients sequentially increase one by one up to the (l+1)th tap, become a constant value (l+1) from the (l+1)th tap up to the (k+1)th tap, and sequentially decrement one by one from the (k+1)th tap to the last tap. Therefore, in the FIR filter which realizes such a transfer function by means of hardware, it becomes possible to produce the tap coefficients by using an up/down counter in place of the ROM 1 to thereby further reduce the hardware amount.
However, in the conventional arrangement as shown in FIG. 2, if three or more moving average filters are cascade-connected to form a FIR filter, the monotoneity of the tap coefficients described above disappears. As a result, a ROM for storing the tap coefficients becomes necessary, therefore it is difficult to drastically reduce the hardware amount.